Embedded software & firmware engineer · BS Computer Engineering · Dec 2026 · Hattiesburg, MS
I am a computer engineering student who works where software meets hardware: digital logic on FPGAs, firmware on the boards around it, and the benches that prove both. What holds my attention is the part of a system nobody sees from outside, whether that is a timing report, a scheduler running late by milliseconds, or a residual that only shows at full precision. Every claim below opens into a record with the measurement behind it, and 5 of the fixes are merged in other people’s repositories.
Away from the bench: soccer, music, a guitar I am slowly getting better at, and chess, which I picked back up this year.
Open to new grad roles
Aug 2023 – Dec 2026
University of Southern Mississippi · GPA 3.934 / 4.0 · Honors Scholar · Academic Excellence Award
Aug 2024 – present
Undergraduate Research Assistant. Generated 800 authentication keys in 1.68 ms within 25 KB of memory overhead by implementing Chebyshev chaotic-map key streaming…
Oct 2025 – Aug 2026
Software & IoT Intern. Cut projection calibration from 10 minutes to 2 while holding sub-3-pixel alignment, by automating homography estimation and…
Apr 2026 – present
Web Developer. Took the National Center for Spectator Sports Safety and Security off edit-in-production releases by containerizing the WordPress…
CASE: Voice-Controlled Self-Balancing Robot. It balances, it listens for its name, and it answers, all on one dual-core microcontroller.
ESP32 · FreeRTOS · C/C++ · PID control · MPU6050 DMP · I²S audio · the full record →
Design and build a two-wheeled self-balancing robot that holds vertical equilibrium via real-time PID control on a dual-core ESP32, integrating on-device wake-word voice input with cloud-based conversational AI so the balance loop is never interrupted by audio processing.
Provisioning and runtime for the illumibot LAVA test rig: one repository owns the Ansible roles, inventory, and secrets that build it, the docker-compose LAVA stack that runs it, and the Mender OTA pipeline that upgrades 20 physical boards on every release.
Build a centralized home-automation platform on industrial SCADA principles rather than consumer smart-home tooling, so the house is supervised the way a plant is. Ignition 8.1 Perspective runs the HMI, every room is modeled as a User-Defined Type, and ESP32 nodes reach the historian over MQTT with Node-RED handling the transforms. That gives reliable real-time monitoring and control of 10+ IoT devices at sub-second response latency.
Build an intelligent travel-authorization platform for the U.S. Department of Defense that uses AI agents to validate requests, route approvals, and orchestrate multi-step approval chains in place of a slow, manual workflow.
Design, validate, and print the physical parts the projection product and its test bench depend on, from a room-scale fog wall down to the enclosures that make the electronics shippable.
Accepted · first author
4th Intl. Conf. on AI, Blockchain and IoT · Accepted 2026
Meters are paired so their added noise cancels exactly at the aggregator: the utility reads a true sum while no individual reading is recoverable from the stream. The noise layer is written in RTL and runs on a Nexys A7-100T at 100 MHz as a pipelined multiply-accumulate datapath mapped onto the FPGA’s DSP slices, which is the structure a filter or a correlator is built from.
CRA UR2PhD · presented
University of Southern Mississippi · Summer 2026
A framework for charging a vehicle while it is still moving. Every expensive operation moves off the real-time path into offline registration, so authentication finishes inside the milliseconds an electric vehicle spends over a charging pad at highway speed. Per-session pseudonyms keep the route private, and settlement is decentralized so no single provider holds the account. Written under the CRA UR2PhD program, where the proposal was presented and the program certification completed.
In progress · undergraduate research
University of Southern Mississippi · 2024 – present
An FPGA authentication scheme for eVTOL drones built on Chebyshev chaotic maps and SHA in VHDL-2019. Keys are generated from a shared seed on demand rather than stored, so a fleet’s key material never sits on the aircraft.
THE CHASSIS · 5° SHOVE · LEAN DRAWN ×3
ANGLE · 3 s AT 100 Hz
peak 4.9° · settled in 0.13 s · resting 0.12° off upright
A small-angle model of the plant with a standing imbalance and a noisy angle, stepped at the robot’s own 100 Hz. The numbers are this simulation’s and the rate is the robot’s; the button loads the three gains its firmware actually runs. Drag Ki to zero and it recovers but stays leaning; drop Kd and it overshoots nearly twice as far; wind Kd up and the command chatters on sensor noise.
ArduPilot/ardupilot
Apple clang aborted the test before a single assertion ran.
gazebosim/sdformat
A frame resolved against itself came back with a residual near 2⁻⁵⁶, enough to tilt a joint axis on macOS arm64.
Same bug, one repository downstream
gazebosim/gz-sim
gz model reported a joint axis of [0 1.26714e-17 1] on macOS arm64, with two expectations switched off behind an #ifndef __aarch64__ rather than explained.
maurodesouza/profile-readme-generator
Deleting a selected section crashed the editor.
faust-machines/fusion360-mcp-server
create_parameter raised AttributeError on every call.
meshtastic/firmware
isaac-sim/IsaacLab
gz model reported a joint axis of [0 1.26714e-17 1] on macOS arm64, with two expectations switched off behind an #ifndef __aarch64__ rather than explained.
A test disabled on one architecture is usually one of two things: an expectation that was never portable, or a real defect that happens to round the other way. The axis it printed decided which. [0 1.26714e-17 1] is not a tolerance question; it is a value that should have been exactly zero.
resolvePose composed an edge chain with its own inverse for that case: identity in real arithmetic, not in floating point.
Returned identity directly for that case, keeping the first resolve call so diagnostics are unchanged, with a unit test and an SDF fixture. Fixed the cause upstream in sdformat first, then reverted the skip exactly and put both checks back.
Left and right arrow keys to step · every fix with its root cause →
BENCH IDLE Twenty devices under test, four colour-coded racks. The rig rebuilds from the repository rather than from memory: twelve Ansible playbooks stand it up from bare metal.
An illustration of the release path, not live status. The counts are the bench’s; the run is drawn here. The rig in full →
How a frame resolving against itself put a floating-point ghost into a robot’s kinematics, why the architecture was the wrong suspect, and what the fix cost.
The ESP32 held the loop at 100 Hz with under 10 µs of measured jitter and could not hold a conversation. What the heap budget decided, what stays on the microcontroller, and why.
2 written, each out of work already on this site.